HI-6200

The HI-6200 family is a fully integrated and dual redundant MIL-STD-1553 BC/RT/MT interface solution which includes 1553 protocol, SRAM and dual transceivers in single 80-pin plastic PQFP and QFN package configurations. The devices are software compatible with the Data Device Corporation (DDC®) Mini-ACE®, Enhanced Mini-ACE®, Micro-ACE®, Mini-ACE® Mark3 and Total-ACE® families of MIL-STD-1553 Terminals and offer additional features such as Error-Correcting Code (ECC) SRAM. The compact single-chip monolithic design offers a significant space and cost saving over the older traditional multi-chip module approach. An improved and simplified high-performance 16-bit host interface provides faster access time to the Shared RAM, significantly reducing latency and CPU utilization. The on-chip ECC RAM provides additional protection against data corruption by automatically detecting and correcting memory errors.

 

Features

  • Dual Redundant MIL-STD-1553A/B/1760 Channel
  • BC/RT/MT or RT/MT Modes
  • RT-only device available (HI-6202)
  • 64Kx16 ECC SRAM
  • External RT Address Inputs
  • MIL-STD-1760 RT “Auto Boot”
  • +3.3V single supply operation
  • Built-in Self-Test
  • Generic 8/16-bit Processor Interface
  • -40°C to +85°C or -55°C to +125°C
    • No Limitations on transmit duty cycle
  • 80-Pin PQFP package
    • 12mm x 12mm x 1.6mm
  • 80-Pin QFN package
    • 12mm x 12mm x 0.8mm

 

Application Benefits

  • Simplified Board Design and Layout
  • Third Party RT Validated
  • Single Die for Improved Reliability
  • Fully Software Compatible to DDC® ACE, Mini-ACE®, Enhanced Mini-ACE®, Micro-ACE®, Mini-ACE® Mark3 and Total-ACE®

 

 

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